Hardware Risk assessment Model checking Formal Methods Interactive DIPLODOCUS SysML-Sec Model-driven engineering Immersion Embedded Systems Timing analysis Analysis Execution Trace Analysis Risk management 3D perception Ingénierie des modèles TTool Propagation Embedded systems Multi-View Design Costs Image processing Differential power analysis DPA Analog/Mixed Signal Design Modeling Safety Behavior MBSE Field programmable gate arrays HW Accelerators Remote sensing Automata HW/SW partitioning Robustness Signal processing Attacks Risque Formal verification Hardware/software partitioning Hardware Architecture Security Modélisation URSI Autonomous vehicles Requirements Models Malware Exploration d'architecture Computer architecture Model driven engineering Drones Android Communications Performance FPGA UAV Drone Open Platforms for Multistandard Support Model-based engineering Classification SDR Verification Virtual Prototyping Application specific integrated circuits Model Driven Engineering Autonomy Baseband Processing CPS Hardware/software co-design UML Code generation Disaster management System-level design ProVerif System-on-Chip Autonomous navigation Simulation Virtual prototyping Design Iterative decoding LDPC codes Model-checking Heterogeneous models Cognitive Radio Integration Coprocessors Formal methods Model Checking MDE Design Space Exploration SysML Design space exploration Cryptography Requirements analysis Architecture UML/SysML Reliable systems Dependency Graph GPR Formal Verification